				;file c:\users\edenlai\desktop\esk310\switch control\SEVEN SEGMENT CONTROL WITH SWITCH.c
				;1	/************************************************************
				;2	* PROGRAM : SEVEN SEGMENT CONTROL WITH SWITCH
				;3	* Wire Connection:
				;4	*   ESK303 (VDD) connects to ESK310 (5V)
				;5	*   ESK303 (GND) connects to ESK310 (GND)
				;6	*   ESK303 (C0~C6) connects to ESK310 ((JP7)a~g)
				;7	*   ESK303 (VDD) connects to ESK310 ((JP8)4)
				;8	*   ESK303 (A1) connects to ESK310 ((JP18)4)
				;9	* Created on 2021/08/27 by Best Modules Corp.
				;10	*************************************************************/
				;11	#include <HT66F2390.h>
				;12	#include "setup.h"
				;13	
				;14	void main()
				;15	{	
				@code .SECTION 'CODE'
				include HT66F2390.inc
0000	1F0B	clr     PBP
0001	2802	jmp     _main_startup1
				@start .SECTION 'CODE'
				_main_startup1:
				@start .SECTION 'CODE'
0002	0F00	mov     a, 0H
0003	008B	mov     PBP, a
0004	2843	jmp     _main
0005	063F	and     a, LVRC
0006	4F5B	dc	04F5BH
0007	6D66	jmp     D66H
0008	077D	mov     a, FD3H
0009	677F	call    F7FH
000A	0000	nop
000B	0000	nop
				L000C:
000C	0000	nop
000D	0000	nop
000E	0000	nop
				L000F:
000F	0000	nop
0010	1785	sdz     ACC
0011	280F	jmp     L000F
				L0012:
0012	0000	nop
0013	1785	sdz     ACC
0014	2812	jmp     L0012
0015	5783	sdz     rc[1]
0016	2812	jmp     L0012
0017	0003	ret
				;16		setup();
				_main:
				_main:
0043	203D	call    _setup
				;17		unsigned char i=0;
0044	5F00	clr     ra
				;18		
				;19		while(1)
				;20		{	
				;21			while(!SW1_Port)						     	//Wait for SWITCH to toggle
				_L13:
0045	3C94	sz      PA1
0046	2845	jmp     _L13
				;22			{
				;23				SEGMENT_Port=SEGMENT_TAB[i++];	
0047	5400	inca    ra
0048	4086	mov     _main_2, a
0049	0F0A	mov     a, AH
004A	4300	add     a, ra
004B	0083	mov     MP1L, a
004C	0F80	mov     a, 80H
004D	1F04	clr     MP1H
004E	1384	adcm    a, MP1H
004F	2030	call    L0030
0050	009B	mov     PC, a
				;24				Delay10ms(100);						////delay 1 second 
0051	0F64	mov     a, 64H
0052	4084	mov     delay, a
0053	5F05	clr     delay[1]
0054	2018	call    _Delay10ms
				;25				if(i>9) i=0;						//if i>9 , i=0
0055	0F09	mov     a, 9H
0056	4206	sub     a, _main_2
0057	3C0A	sz      C
0058	285A	jmp     _L11
0059	5F06	clr     _main_2
				_L11:
005A	4706	mov     a, _main_2
005B	4080	mov     ra, a
005C	2845	jmp     _L13
005D	285D	jmp     $
				L0D66:
				org	0d66h
0D66	0000	nop
				L0F7F:
				org	0f7fh
0F7F	0000	nop
				;26			}
				;27		}
				;28	}	
				;file c:\users\edenlai\desktop\esk310\switch control\setup.h
				;1	#define		SEGMENT_Port	_pc
				;2	#define		SEGMENT_PortC	_pcc
				;3	#define		SW1_Port		_pa1						
				;4	#define		SW1_PortC		_pac1						
				;5	#define		SW1_PortPU		_papu1	
				;6	const unsigned char SEGMENT_TAB[] = {0x3F,0x06,0x5B,0x4F,0x66, 0x6D,0x7D,0x07,0x7F,0x67};	//Seven-Segment Table
				;7	
				;8	void setup()										//Delay1ms
				;9	{	
				;10		_wdtc=0xAB;										//Turn off the watchdog timer
				_setup:
				_setup:
003D	0FAB	mov     a, ABH
003E	00BE	mov     WDTC, a
				;11		SEGMENT_PortC=0;								//Set SEGMENT_Port to output mode
003F	1F1C	clr     PCC
				;12		SW1_PortC=1; 									//Set SEGMENT_Port to output mode
0040	3095	set     PAC1
				;13		SW1_PortPU=1;                      				//Set SEGMENT_Port to output mode規劃為輸入屬性並致能提升電阻
0041	3096	set     PAPU1
0042	0003	ret
				;14	}
				;15	
				;16	void Delay1ms(unsigned short delay)					//Delay1ms
				;17	{	
				;18		unsigned short i;											
				;19		for(i=0;i<delay;i++) GCC_DELAY(2000);			//GCC_DELAY(0.5us)
				;20	}	
				;21	
				;22	void Delay10ms(unsigned short delay)				//Delay10ms
				;23	{	
				;24		unsigned short i;											
				;25		for(i=0;i<delay;i++) GCC_DELAY(20000);			//GCC_DELAY(0.5us)
				_Delay10ms:
				_Delay10ms:
0018	5F01	clr     rb
0019	5F02	clr     rc
001A	2828	jmp     _L7
				_L8:
001B	0F13	mov     a, 13H
001C	4083	mov     rc[1], a
001D	0F7B	mov     a, 7BH
001E	340B	clr     PBP0
001F	348B	clr     PBP1
0020	350B	clr     PBP2
0021	200C	call    L000C
0022	350B	clr     PBP2
0023	348B	clr     PBP1
0024	340B	clr     PBP0
0025	5481	inc     rb
0026	3D0A	sz      Z
0027	5482	inc     rc
				_L7:
0028	4701	mov     a, rb
0029	4204	sub     a, delay[0]
002A	4702	mov     a, rc
002B	5205	sbc     a, delay[1]
002C	3B0A	snz     CZ
002D	281B	jmp     _L8
002E	0003	ret
002F	1483	inc     MP1L
				L0030:
0030	3F84	sz      MP1H.7
0031	2834	jmp     L0034
0032	0702	mov     a, [02H]
0033	0003	ret
				L0034:
0034	1B04	rrca    MP1H
0035	0E3F	and     a, 3FH
0036	0089	mov     TBHP, a
0037	1B03	rrca    MP1L
0038	0087	mov     TBLP, a
0039	1D05	tabrd   ACC
003A	3C0A	sz      C
003B	0708	mov     a, TBLH
003C	0003	ret
				;26	}
				data .SECTION 'DATA'
				__pa DB DUP (?) ; __pa
				__pac DB DUP (?) ; __pac
				__papu DB DUP (?) ; __papu
				__pc DB DUP (?) ; __pc
				__pcc DB DUP (?) ; __pcc
				__wdtc DB DUP (?) ; __wdtc
				ra DB DUP (?)
				rb DB DUP (?)
				rc DB DUP (?)
				delay DB 2 DUP (?) ; delay
				_main_2 DB DUP (?)
