; Generated by holtek-gcc v3.19, Tue Jul 14 17:11:39 2020
; 
; Configuration:
;       with long instruction
;       Multi-ROM, Multi-RAM
;       bits_per_rom_unit:16
;       with mp1
;       with tbhp, address(0x9)
;          Use tabrd-const
;       
; SFR address of long-instruction arch:
;    mp0 = -1,1,0
;    mp1 = 4,3,2
;    mp2 = 14,13,12
;    tbp = 9,7,8
;    acc = 5
;    pcl = 6
;    status = 10
;    bp = 11
;    intc = 16
;       
;       
; use 'tabrdc' instead of 'tabrd'
;       

#pragma translator "holtek-gcc 4.6.4" "3.19" "build 20130711"
; Rebuild 718

ir equ [2]
mp equ [3]
sbp equ [4]
acc equ [5]
bp equ [11]
tblp equ [7]
tbhp equ [9]
status equ [10]
c equ [10].0
ac equ [10].1
z equ [10].2
ov equ [10].3
cz equ [10].6
sc equ [10].7
intc equ [16]
mduwr0 equ [59h]
mduwr1 equ [5ah]
mduwr2 equ [5bh]
mduwr3 equ [5ch]
mduwr4 equ [5dh]
mduwr5 equ [5eh]
mduwrctrl equ [5fh]

extern ra:byte
extern rb:byte
extern rc:byte
extern rd:byte
extern re:byte
extern rf:byte
extern rg:byte
extern rh:byte
extern _Crom2Prom:near
extern _Crom2PromNext:near

RAMBANK 0 @BITDATASEC, @BITDATASEC1
@HCCINIT	.section 'data'
@HCCINIT0	.section 'data'
@BITDATASEC	 .section 'data'
@BITDATASEC1	 .section 'data'

#pragma debug scope 1 1
	extern __DELAY3:near
	extern __DELAYX3:near
	extern __DELAYX6:near
	extern __DELAYY5:near
	extern __DELAYY3:near
	extern _builtin_holtek_delay_2:byte
___scc equ [58]
___hircc equ [59]
___lxtc equ [61]
___pfs1 equ [345]
public _Drv_SysClockInit
#pragma debug scope 2 1
#line 30 "C:\Users\iris\Desktop\2. demo code\BH67F5362_EEPROM\BH67F5362_Drv\Drv_SysClock.c"
_Drv_SysClockInit .section 'code'
_Drv_SysClockInit proc
#line 33 "C:\Users\iris\Desktop\2. demo code\BH67F5362_EEPROM\BH67F5362_Drv\Drv_SysClock.c"
	clr [58].3
#line 34 "C:\Users\iris\Desktop\2. demo code\BH67F5362_EEPROM\BH67F5362_Drv\Drv_SysClock.c"
	mov a,1
	mov [59],a
_L3:
#line 35 "C:\Users\iris\Desktop\2. demo code\BH67F5362_EEPROM\BH67F5362_Drv\Drv_SysClock.c"
	snz [59].1
	jmp _L3
#line 48 "C:\Users\iris\Desktop\2. demo code\BH67F5362_EEPROM\BH67F5362_Drv\Drv_SysClock.c"
	set [61].0
#line 49 "C:\Users\iris\Desktop\2. demo code\BH67F5362_EEPROM\BH67F5362_Drv\Drv_SysClock.c"
	set [58].2
#line 50 "C:\Users\iris\Desktop\2. demo code\BH67F5362_EEPROM\BH67F5362_Drv\Drv_SysClock.c"
	set [58].0
#line 51 "C:\Users\iris\Desktop\2. demo code\BH67F5362_EEPROM\BH67F5362_Drv\Drv_SysClock.c"
	lset [345].3
	lset [345].2
#line 52 "C:\Users\iris\Desktop\2. demo code\BH67F5362_EEPROM\BH67F5362_Drv\Drv_SysClock.c"
	lset [345].1
	lset [345].0
#line 53 "C:\Users\iris\Desktop\2. demo code\BH67F5362_EEPROM\BH67F5362_Drv\Drv_SysClock.c"
	jmp _L4
_L5:
#line 55 "C:\Users\iris\Desktop\2. demo code\BH67F5362_EEPROM\BH67F5362_Drv\Drv_SysClock.c"
;# 55 "C:\Users\iris\Desktop\2. demo code\BH67F5362_EEPROM\BH67F5362_Drv\Drv_SysClock.c" 1
	clr wdt
_L4:
#line 53 "C:\Users\iris\Desktop\2. demo code\BH67F5362_EEPROM\BH67F5362_Drv\Drv_SysClock.c"
	snz [61].1
	jmp _L5
	ret
_Drv_SysClockInit endp
#line 53 "C:\Users\iris\Desktop\2. demo code\BH67F5362_EEPROM\BH67F5362_Drv\Drv_SysClock.c"
#pragma debug scope 1 1
#pragma debug struct_begin 42 "__scc_bits"
#pragma debug field 21 8 0 1 "__fsiden" ;0,1
#pragma debug field 21 8 0 1 "__fhiden" ;1,1
#pragma debug field 21 8 0 1 "__fss" ;2,1
#pragma debug field 21 8 0 1 "__fhs" ;3,1
#pragma debug field 21 8 0 1 ;4,1
#pragma debug field 21 8 0 1 "__cks0" ;5,1
#pragma debug field 21 8 0 1 "__cks1" ;6,1
#pragma debug field 21 8 0 1 "__cks2" ;7,1
#pragma debug struct_end
#pragma debug union_begin 43 ""
#pragma debug field 2 42 "bits"
#pragma debug field 0 8 "byte"
#pragma debug union_end
#pragma debug variable 43 1 ___scc "__scc" 1
#pragma debug struct_begin 44 "__hircc_bits"
#pragma debug field 21 8 0 1 "__hircen" ;0,1
#pragma debug field 21 8 0 1 "__hircf" ;1,1
#pragma debug field 21 8 0 1 "__hirc0" ;2,1
#pragma debug field 21 8 0 1 "__hirc1" ;3,1
#pragma debug field 21 8 0 4 ;4,4
#pragma debug struct_end
#pragma debug union_begin 45 ""
#pragma debug field 2 44 "bits"
#pragma debug field 0 8 "byte"
#pragma debug union_end
#pragma debug variable 45 1 ___hircc "__hircc" 1
#pragma debug struct_begin 46 "__lxtc_bits"
#pragma debug field 21 8 0 1 "__lxten" ;0,1
#pragma debug field 21 8 0 1 "__lxtf" ;1,1
#pragma debug field 21 8 0 6 ;2,6
#pragma debug struct_end
#pragma debug union_begin 47 ""
#pragma debug field 2 46 "bits"
#pragma debug field 0 8 "byte"
#pragma debug union_end
#pragma debug variable 47 1 ___lxtc "__lxtc" 1
#pragma debug struct_begin 48 "__pfs1_bits"
#pragma debug field 21 8 0 1 "__pfs10" ;0,1
#pragma debug field 21 8 0 1 "__pfs11" ;1,1
#pragma debug field 21 8 0 1 "__pfs12" ;2,1
#pragma debug field 21 8 0 1 "__pfs13" ;3,1
#pragma debug field 21 8 0 1 "__pfs14" ;4,1
#pragma debug field 21 8 0 1 "__pfs15" ;5,1
#pragma debug field 21 8 0 1 "__pfs16" ;6,1
#pragma debug field 21 8 0 1 "__pfs17" ;7,1
#pragma debug struct_end
#pragma debug union_begin 49 ""
#pragma debug field 2 48 "bits"
#pragma debug field 0 8 "byte"
#pragma debug union_end
#pragma debug variable 49 1 ___pfs1 "__pfs1" 1

; 
; Generated by holtek-gcc v3.19, Tue Jul 14 17:11:39 2020
; Rebuild 718
; end of file
