; Generated by holtek-gcc v3.19, Tue Jul 14 16:50:00 2020
; 
; Configuration:
;       with long instruction
;       Multi-ROM, Multi-RAM
;       bits_per_rom_unit:16
;       with mp1
;       with tbhp, address(0x9)
;          Use tabrd-const
;       
; SFR address of long-instruction arch:
;    mp0 = -1,1,0
;    mp1 = 4,3,2
;    mp2 = 14,13,12
;    tbp = 9,7,8
;    acc = 5
;    pcl = 6
;    status = 10
;    bp = 11
;    intc = 16
;       
;       
; use 'tabrdc' instead of 'tabrd'
;       

#pragma translator "holtek-gcc 4.6.4" "3.19" "build 20130711"
; Rebuild 718

ir equ [2]
mp equ [3]
sbp equ [4]
acc equ [5]
bp equ [11]
tblp equ [7]
tbhp equ [9]
status equ [10]
c equ [10].0
ac equ [10].1
z equ [10].2
ov equ [10].3
cz equ [10].6
sc equ [10].7
intc equ [16]
mduwr0 equ [59h]
mduwr1 equ [5ah]
mduwr2 equ [5bh]
mduwr3 equ [5ch]
mduwr4 equ [5dh]
mduwr5 equ [5eh]
mduwrctrl equ [5fh]

extern ra:byte
extern rb:byte
extern rc:byte
extern rd:byte
extern re:byte
extern rf:byte
extern rg:byte
extern rh:byte
extern _Crom2Prom:near
extern _Crom2PromNext:near

RAMBANK 0 @BITDATASEC, @BITDATASEC1
@HCCINIT	.section 'data'
@HCCINIT0	.section 'data'
@BITDATASEC	 .section 'data'
@BITDATASEC1	 .section 'data'

#pragma debug scope 1 1
	extern __DELAY3:near
	extern __DELAYX3:near
	extern __DELAYX6:near
	extern __DELAYY5:near
	extern __DELAYY3:near
	extern _builtin_holtek_delay_2:byte
___status equ [10]
___wdtc equ [62]
___lvrc equ [63]
___pac equ [21]
___papu equ [22]
___pas1 equ [335]
___ifs2 equ [331]
___integ equ [57]
___intc0 equ [16]
public _main
#pragma debug scope 2 1
#line 11 "C:\Users\iris\Desktop\2. demo code\BH67F5362_INT\Source\main.c"
IFDEF WITH_DEFAULT_STARTUP
extern _main_initial0:near
extern _main_startup:near
ENDIF

ROMBANK 0 @start
@start .section com_l 'code'
_main_startup1:
@start .section com_e 'code'
	mov a,bank _main
	mov bp,a
	jmp _main

_main .section 'code'
_main proc
#line 14 "C:\Users\iris\Desktop\2. demo code\BH67F5362_INT\Source\main.c"
	snz [10].5
	jmp _L2
#line 14 "C:\Users\iris\Desktop\2. demo code\BH67F5362_INT\Source\main.c"
	sz [10].4
	jmp _L3
_L2:
#line 17 "C:\Users\iris\Desktop\2. demo code\BH67F5362_INT\Source\main.c"
	fcall _Drv_SysClockInit
#line 18 "C:\Users\iris\Desktop\2. demo code\BH67F5362_INT\Source\main.c"
	fcall _Drv_RamInit
#line 19 "C:\Users\iris\Desktop\2. demo code\BH67F5362_INT\Source\main.c"
	mov a,82
	mov [62],a
#line 20 "C:\Users\iris\Desktop\2. demo code\BH67F5362_INT\Source\main.c"
	mov a,85
	mov [63],a
#line 23 "C:\Users\iris\Desktop\2. demo code\BH67F5362_INT\Source\main.c"
	clr _INT0_FLAG
#line 24 "C:\Users\iris\Desktop\2. demo code\BH67F5362_INT\Source\main.c"
	set [21].6
#line 25 "C:\Users\iris\Desktop\2. demo code\BH67F5362_INT\Source\main.c"
	set [22].6
#line 26 "C:\Users\iris\Desktop\2. demo code\BH67F5362_INT\Source\main.c"
	lclr [335].5
	lclr [335].4
	lset [331].0
#line 27 "C:\Users\iris\Desktop\2. demo code\BH67F5362_INT\Source\main.c"
	set [57].1
#line 28 "C:\Users\iris\Desktop\2. demo code\BH67F5362_INT\Source\main.c"
	clr [57].0
#line 29 "C:\Users\iris\Desktop\2. demo code\BH67F5362_INT\Source\main.c"
	clr [16].4
#line 30 "C:\Users\iris\Desktop\2. demo code\BH67F5362_INT\Source\main.c"
	set [16].1
#line 31 "C:\Users\iris\Desktop\2. demo code\BH67F5362_INT\Source\main.c"
	set [16].0
	jmp _L6
_L3:
#line 37 "C:\Users\iris\Desktop\2. demo code\BH67F5362_INT\Source\main.c"
;# 37 "C:\Users\iris\Desktop\2. demo code\BH67F5362_INT\Source\main.c" 1
	clr wdt
_L6:
#line 43 "C:\Users\iris\Desktop\2. demo code\BH67F5362_INT\Source\main.c"
;# 43 "C:\Users\iris\Desktop\2. demo code\BH67F5362_INT\Source\main.c" 1
	clr wdt
#line 44 "C:\Users\iris\Desktop\2. demo code\BH67F5362_INT\Source\main.c"
	snz _INT0_FLAG
	jmp _L6
#line 47 "C:\Users\iris\Desktop\2. demo code\BH67F5362_INT\Source\main.c"
	clr _INT0_FLAG
	jmp _L6
	jmp $
_main endp

@dummy proc
	call _main
@dummy endp

#line 47 "C:\Users\iris\Desktop\2. demo code\BH67F5362_INT\Source\main.c"
#pragma debug scope 1 1
#pragma debug struct_begin 42 "__status_bits"
#pragma debug field 21 8 0 1 "__c" ;0,1
#pragma debug field 21 8 0 1 "__ac" ;1,1
#pragma debug field 21 8 0 1 "__z" ;2,1
#pragma debug field 21 8 0 1 "__ov" ;3,1
#pragma debug field 21 8 0 1 "__pdf" ;4,1
#pragma debug field 21 8 0 1 "__to" ;5,1
#pragma debug field 21 8 0 1 "__cz" ;6,1
#pragma debug field 21 8 0 1 "__sc" ;7,1
#pragma debug struct_end
#pragma debug union_begin 43 ""
#pragma debug field 2 42 "bits"
#pragma debug field 0 8 "byte"
#pragma debug union_end
#pragma debug variable 43 1 ___status "__status" 1
#pragma debug struct_begin 44 "__intc0_bits"
#pragma debug field 21 8 0 1 "__emi" ;0,1
#pragma debug field 21 8 0 1 "__int0e" ;1,1
#pragma debug field 21 8 0 1 "__int1e" ;2,1
#pragma debug field 21 8 0 1 "__mf6e" ;3,1
#pragma debug field 21 8 0 1 "__int0f" ;4,1
#pragma debug field 21 8 0 1 "__int1f" ;5,1
#pragma debug field 21 8 0 1 "__mf6f" ;6,1
#pragma debug field 21 8 0 1 ;7,1
#pragma debug struct_end
#pragma debug union_begin 45 ""
#pragma debug field 2 44 "bits"
#pragma debug field 0 8 "byte"
#pragma debug union_end
#pragma debug variable 45 1 ___intc0 "__intc0" 1
#pragma debug struct_begin 46 "__pac_bits"
#pragma debug field 21 8 0 1 "__pac0" ;0,1
#pragma debug field 21 8 0 1 "__pac1" ;1,1
#pragma debug field 21 8 0 1 "__pac2" ;2,1
#pragma debug field 21 8 0 1 "__pac3" ;3,1
#pragma debug field 21 8 0 1 "__pac4" ;4,1
#pragma debug field 21 8 0 1 "__pac5" ;5,1
#pragma debug field 21 8 0 1 "__pac6" ;6,1
#pragma debug field 21 8 0 1 "__pac7" ;7,1
#pragma debug struct_end
#pragma debug union_begin 47 ""
#pragma debug field 2 46 "bits"
#pragma debug field 0 8 "byte"
#pragma debug union_end
#pragma debug variable 47 1 ___pac "__pac" 1
#pragma debug struct_begin 48 "__papu_bits"
#pragma debug field 21 8 0 1 "__papu0" ;0,1
#pragma debug field 21 8 0 1 "__papu1" ;1,1
#pragma debug field 21 8 0 1 "__papu2" ;2,1
#pragma debug field 21 8 0 1 "__papu3" ;3,1
#pragma debug field 21 8 0 1 "__papu4" ;4,1
#pragma debug field 21 8 0 1 "__papu5" ;5,1
#pragma debug field 21 8 0 1 "__papu6" ;6,1
#pragma debug field 21 8 0 1 "__papu7" ;7,1
#pragma debug struct_end
#pragma debug union_begin 49 ""
#pragma debug field 2 48 "bits"
#pragma debug field 0 8 "byte"
#pragma debug union_end
#pragma debug variable 49 1 ___papu "__papu" 1
#pragma debug struct_begin 50 "__integ_bits"
#pragma debug field 21 8 0 1 "__int0s0" ;0,1
#pragma debug field 21 8 0 1 "__int0s1" ;1,1
#pragma debug field 21 8 0 1 "__int1s0" ;2,1
#pragma debug field 21 8 0 1 "__int1s1" ;3,1
#pragma debug field 21 8 0 1 "__int2s0" ;4,1
#pragma debug field 21 8 0 1 "__int2s1" ;5,1
#pragma debug field 21 8 0 1 "__int3s0" ;6,1
#pragma debug field 21 8 0 1 "__int3s1" ;7,1
#pragma debug struct_end
#pragma debug union_begin 51 ""
#pragma debug field 2 50 "bits"
#pragma debug field 0 8 "byte"
#pragma debug union_end
#pragma debug variable 51 1 ___integ "__integ" 1
#pragma debug struct_begin 52 "__wdtc_bits"
#pragma debug field 21 8 0 1 "__ws0" ;0,1
#pragma debug field 21 8 0 1 "__ws1" ;1,1
#pragma debug field 21 8 0 1 "__ws2" ;2,1
#pragma debug field 21 8 0 1 "__we0" ;3,1
#pragma debug field 21 8 0 1 "__we1" ;4,1
#pragma debug field 21 8 0 1 "__we2" ;5,1
#pragma debug field 21 8 0 1 "__we3" ;6,1
#pragma debug field 21 8 0 1 "__we4" ;7,1
#pragma debug struct_end
#pragma debug union_begin 53 ""
#pragma debug field 2 52 "bits"
#pragma debug field 0 8 "byte"
#pragma debug union_end
#pragma debug variable 53 1 ___wdtc "__wdtc" 1
#pragma debug struct_begin 54 "__lvrc_bits"
#pragma debug field 21 8 0 1 "__lvs0" ;0,1
#pragma debug field 21 8 0 1 "__lvs1" ;1,1
#pragma debug field 21 8 0 1 "__lvs2" ;2,1
#pragma debug field 21 8 0 1 "__lvs3" ;3,1
#pragma debug field 21 8 0 1 "__lvs4" ;4,1
#pragma debug field 21 8 0 1 "__lvs5" ;5,1
#pragma debug field 21 8 0 1 "__lvs6" ;6,1
#pragma debug field 21 8 0 1 "__lvs7" ;7,1
#pragma debug struct_end
#pragma debug union_begin 55 ""
#pragma debug field 2 54 "bits"
#pragma debug field 0 8 "byte"
#pragma debug union_end
#pragma debug variable 55 1 ___lvrc "__lvrc" 1
#pragma debug struct_begin 56 "__ifs2_bits"
#pragma debug field 21 8 0 1 "__int0ps" ;0,1
#pragma debug field 21 8 0 1 "__int1ps" ;1,1
#pragma debug field 21 8 0 1 "__int2ps" ;2,1
#pragma debug field 21 8 0 1 "__int3ps" ;3,1
#pragma debug field 21 8 0 1 "__scksclps" ;4,1
#pragma debug field 21 8 0 1 "__sdisdaps" ;5,1
#pragma debug field 21 8 0 1 "__scsbps" ;6,1
#pragma debug field 21 8 0 1 ;7,1
#pragma debug struct_end
#pragma debug union_begin 57 ""
#pragma debug field 2 56 "bits"
#pragma debug field 0 8 "byte"
#pragma debug union_end
#pragma debug variable 57 1 ___ifs2 "__ifs2" 1
#pragma debug struct_begin 58 "__pas1_bits"
#pragma debug field 21 8 0 1 "__pas10" ;0,1
#pragma debug field 21 8 0 1 "__pas11" ;1,1
#pragma debug field 21 8 0 1 "__pas12" ;2,1
#pragma debug field 21 8 0 1 "__pas13" ;3,1
#pragma debug field 21 8 0 1 "__pas14" ;4,1
#pragma debug field 21 8 0 1 "__pas15" ;5,1
#pragma debug field 21 8 0 1 "__pas16" ;6,1
#pragma debug field 21 8 0 1 "__pas17" ;7,1
#pragma debug struct_end
#pragma debug union_begin 59 ""
#pragma debug field 2 58 "bits"
#pragma debug field 0 8 "byte"
#pragma debug union_end
#pragma debug variable 59 1 ___pas1 "__pas1" 1

; output external variables
extern _INT0_FLAG:bit
#line 11 "C:\Users\iris\Desktop\2. demo code\BH67F5362_INT\Source\main.c"
@code .section at 0 'code'
	clr bp
	jmp _main_startup1

extern _Drv_SysClockInit:near
extern _Drv_RamInit:near

; 
; Generated by holtek-gcc v3.19, Tue Jul 14 16:50:00 2020
; Rebuild 718
; end of file
