; Generated by holtek-gcc v3.20, Fri Aug 28 11:13:52 2020
; 
; Configuration:
;       with long instruction
;       Multi-ROM, Multi-RAM
;       bits_per_rom_unit:16
;       with mp1
;       with tbhp, address(0x9)
;          Use tabrd-const
;       
; SFR address of long-instruction arch:
;    mp0 = -1,1,0
;    mp1 = 4,3,2
;    mp2 = 14,13,12
;    tbp = 9,7,8
;    acc = 5
;    pcl = 6
;    status = 10
;    bp = 11
;    intc = 16
;       
;       
; use 'tabrdc' instead of 'tabrd'
;       

#pragma translator "holtek-gcc 4.6.4" "3.20" "build 20130711"
; Rebuild 610

ir equ [2]
mp equ [3]
sbp equ [4]
acc equ [5]
bp equ [11]
tblp equ [7]
tbhp equ [9]
status equ [10]
c equ [10].0
ac equ [10].1
z equ [10].2
ov equ [10].3
cz equ [10].6
sc equ [10].7
intc equ [16]
mduwr0 equ [59h]
mduwr1 equ [5ah]
mduwr2 equ [5bh]
mduwr3 equ [5ch]
mduwr4 equ [5dh]
mduwr5 equ [5eh]
mduwrctrl equ [5fh]

extern ra:byte
extern rb:byte
extern rc:byte
extern rd:byte
extern re:byte
extern rf:byte
extern rg:byte
extern rh:byte
extern _Crom2Prom:near
extern _Crom2PromNext:near

RAMBANK 0 @BITDATASEC, @BITDATASEC1
@HCCINIT	.section 'data'
@HCCINIT0	.section 'data'
@BITDATASEC	 .section 'data'
@BITDATASEC1	 .section 'data'

#pragma debug scope 1 1
	extern __DELAY3:near
	extern __DELAYX3:near
	extern __DELAYX6:near
	extern __DELAYY5:near
	extern __DELAYY3:near
	extern _builtin_holtek_delay_2:byte
___status equ [10]
___wdtc equ [62]
___lvrc equ [63]
public _main
#pragma debug scope 2 1
#line 14 "c:\users\iris\desktop\2. demo code\bh67f5362_simiic\Source\main.c"
IFDEF WITH_DEFAULT_STARTUP
extern _main_initial0:near
extern _main_startup:near
ENDIF

ROMBANK 0 @start
@start .section com_l 'code'
_main_startup1:
@start .section com_e 'code'
	mov a,bank _main
	mov bp,a
	jmp _main

_main .section 'code'
_main proc
#line 17 "c:\users\iris\desktop\2. demo code\bh67f5362_simiic\Source\main.c"
	snz [10].5
	jmp _L2
#line 17 "c:\users\iris\desktop\2. demo code\bh67f5362_simiic\Source\main.c"
	sz [10].4
	jmp _L3
_L2:
#pragma debug scope 3 2
;begin block, line: 17.-1
#line 20 "c:\users\iris\desktop\2. demo code\bh67f5362_simiic\Source\main.c"
	fcall _Drv_SysClockInit
#line 21 "c:\users\iris\desktop\2. demo code\bh67f5362_simiic\Source\main.c"
	fcall _Drv_RamInit
#line 22 "c:\users\iris\desktop\2. demo code\bh67f5362_simiic\Source\main.c"
	mov a,82
	mov [62],a
#line 23 "c:\users\iris\desktop\2. demo code\bh67f5362_simiic\Source\main.c"
	mov a,85
	mov [63],a
#line 39 "c:\users\iris\desktop\2. demo code\bh67f5362_simiic\Source\main.c"
	mov a,64
	mov _SIM_Data[20],a
#line 40 "c:\users\iris\desktop\2. demo code\bh67f5362_simiic\Source\main.c"
	mov a,65
	mov _SIM_Data[21],a
#line 41 "c:\users\iris\desktop\2. demo code\bh67f5362_simiic\Source\main.c"
	mov a,66
	mov _SIM_Data[22],a
#line 48 "c:\users\iris\desktop\2. demo code\bh67f5362_simiic\Source\main.c"
	fcall _Drv_SIM_PowerOn
_L3:
#pragma debug scope 2 1
#line 55 "c:\users\iris\desktop\2. demo code\bh67f5362_simiic\Source\main.c"
;# 55 "c:\users\iris\desktop\2. demo code\bh67f5362_simiic\Source\main.c" 1
	clr wdt
	jmp _L3
	jmp $
_main endp

@dummy proc
	call _main
@dummy endp

#line 55 "c:\users\iris\desktop\2. demo code\bh67f5362_simiic\Source\main.c"
#pragma debug scope 1 1
#pragma debug struct_begin 42 "__status_bits"
#pragma debug field 21 8 0 1 "__c" ;0,1
#pragma debug field 21 8 0 1 "__ac" ;1,1
#pragma debug field 21 8 0 1 "__z" ;2,1
#pragma debug field 21 8 0 1 "__ov" ;3,1
#pragma debug field 21 8 0 1 "__pdf" ;4,1
#pragma debug field 21 8 0 1 "__to" ;5,1
#pragma debug field 21 8 0 1 "__cz" ;6,1
#pragma debug field 21 8 0 1 "__sc" ;7,1
#pragma debug struct_end
#pragma debug union_begin 43 ""
#pragma debug field 2 42 "bits"
#pragma debug field 0 8 "byte"
#pragma debug union_end
#pragma debug variable 43 1 ___status "__status" 1
#pragma debug struct_begin 44 "__wdtc_bits"
#pragma debug field 21 8 0 1 "__ws0" ;0,1
#pragma debug field 21 8 0 1 "__ws1" ;1,1
#pragma debug field 21 8 0 1 "__ws2" ;2,1
#pragma debug field 21 8 0 1 "__we0" ;3,1
#pragma debug field 21 8 0 1 "__we1" ;4,1
#pragma debug field 21 8 0 1 "__we2" ;5,1
#pragma debug field 21 8 0 1 "__we3" ;6,1
#pragma debug field 21 8 0 1 "__we4" ;7,1
#pragma debug struct_end
#pragma debug union_begin 45 ""
#pragma debug field 2 44 "bits"
#pragma debug field 0 8 "byte"
#pragma debug union_end
#pragma debug variable 45 1 ___wdtc "__wdtc" 1
#pragma debug struct_begin 46 "__lvrc_bits"
#pragma debug field 21 8 0 1 "__lvs0" ;0,1
#pragma debug field 21 8 0 1 "__lvs1" ;1,1
#pragma debug field 21 8 0 1 "__lvs2" ;2,1
#pragma debug field 21 8 0 1 "__lvs3" ;3,1
#pragma debug field 21 8 0 1 "__lvs4" ;4,1
#pragma debug field 21 8 0 1 "__lvs5" ;5,1
#pragma debug field 21 8 0 1 "__lvs6" ;6,1
#pragma debug field 21 8 0 1 "__lvs7" ;7,1
#pragma debug struct_end
#pragma debug union_begin 47 ""
#pragma debug field 2 46 "bits"
#pragma debug field 0 8 "byte"
#pragma debug union_end
#pragma debug variable 47 1 ___lvrc "__lvrc" 1

; output external variables
extern _SIM_Data:byte
#line 14 "c:\users\iris\desktop\2. demo code\bh67f5362_simiic\Source\main.c"
@code .section at 0 'code'
	clr bp
	jmp _main_startup1

extern _Drv_SysClockInit:near
extern _Drv_RamInit:near
extern _Drv_SIM_PowerOn:near

; 
; Generated by holtek-gcc v3.20, Fri Aug 28 11:13:52 2020
; Rebuild 610
; end of file
