; Generated by holtek-gcc v3.20, Fri Aug 28 11:21:42 2020
; 
; Configuration:
;       with long instruction
;       Multi-ROM, Multi-RAM
;       bits_per_rom_unit:16
;       with mp1
;       with tbhp, address(0x9)
;          Use tabrd-const
;       
; SFR address of long-instruction arch:
;    mp0 = -1,1,0
;    mp1 = 4,3,2
;    mp2 = 14,13,12
;    tbp = 9,7,8
;    acc = 5
;    pcl = 6
;    status = 10
;    bp = 11
;    intc = 16
;       
;       
; use 'tabrdc' instead of 'tabrd'
;       

#pragma translator "holtek-gcc 4.6.4" "3.20" "build 20130711"
; Rebuild 610

ir equ [2]
mp equ [3]
sbp equ [4]
acc equ [5]
bp equ [11]
tblp equ [7]
tbhp equ [9]
status equ [10]
c equ [10].0
ac equ [10].1
z equ [10].2
ov equ [10].3
cz equ [10].6
sc equ [10].7
intc equ [16]
mduwr0 equ [59h]
mduwr1 equ [5ah]
mduwr2 equ [5bh]
mduwr3 equ [5ch]
mduwr4 equ [5dh]
mduwr5 equ [5eh]
mduwrctrl equ [5fh]

extern ra:byte
extern rb:byte
extern rc:byte
extern rd:byte
extern re:byte
extern rf:byte
extern rg:byte
extern rh:byte
extern _Crom2Prom:near
extern _Crom2PromNext:near

RAMBANK 0 @BITDATASEC, @BITDATASEC1
@HCCINIT	.section 'data'
@HCCINIT0	.section 'data'
@BITDATASEC	 .section 'data'
@BITDATASEC1	 .section 'data'

#pragma debug scope 1 1
	extern __DELAY3:near
	extern __DELAYX3:near
	extern __DELAYX6:near
	extern __DELAYY5:near
	extern __DELAYY3:near
	extern _builtin_holtek_delay_2:byte
___status equ [10]
___wdtc equ [62]
___lvrc equ [63]
___lvdc equ [64]
___mfi3 equ [73]
___intc2 equ [18]
___intc0 equ [16]
public _main
#pragma debug scope 2 1
#line 12 "c:\users\iris\desktop\2. demo code\bh67f5362_lvd\Source\main.c"
IFDEF WITH_DEFAULT_STARTUP
extern _main_initial0:near
extern _main_startup:near
ENDIF

ROMBANK 0 @start
@start .section com_l 'code'
_main_startup1:
@start .section com_e 'code'
	mov a,bank _main
	mov bp,a
	jmp _main

_main .section 'code'
_main proc
#line 15 "c:\users\iris\desktop\2. demo code\bh67f5362_lvd\Source\main.c"
	snz [10].5
	jmp _L2
#line 15 "c:\users\iris\desktop\2. demo code\bh67f5362_lvd\Source\main.c"
	sz [10].4
	jmp _L3
_L2:
#line 18 "c:\users\iris\desktop\2. demo code\bh67f5362_lvd\Source\main.c"
	fcall _Drv_SysClockInit
#line 19 "c:\users\iris\desktop\2. demo code\bh67f5362_lvd\Source\main.c"
	fcall _Drv_RamInit
#line 20 "c:\users\iris\desktop\2. demo code\bh67f5362_lvd\Source\main.c"
	mov a,82
	mov [62],a
#line 21 "c:\users\iris\desktop\2. demo code\bh67f5362_lvd\Source\main.c"
	mov a,85
	mov [63],a
#line 23 "c:\users\iris\desktop\2. demo code\bh67f5362_lvd\Source\main.c"
	mov a,3
	mov [64],a
#line 24 "c:\users\iris\desktop\2. demo code\bh67f5362_lvd\Source\main.c"
	set [64].4
	set [73].0
	clr [73].4
	clr [18].7
	set [18].3
	set [16].0
_L6:
#line 36 "c:\users\iris\desktop\2. demo code\bh67f5362_lvd\Source\main.c"
;# 36 "c:\users\iris\desktop\2. demo code\bh67f5362_lvd\Source\main.c" 1
	clr wdt
#line 39 "c:\users\iris\desktop\2. demo code\bh67f5362_lvd\Source\main.c"
	fcall _Drv_LVD
	mov a,ra
	mov _VBAT[0],a
	mov a,rb
	mov _VBAT[1],a
	mov a,rc
	mov _VBAT[2],a
	mov a,rd
	mov _VBAT[3],a
#line 40 "c:\users\iris\desktop\2. demo code\bh67f5362_lvd\Source\main.c"
	mov a,231
	sub a,ra
	mov a,3
	sbc a,rb
	mov a,0
	sbc a,rc
	mov a,0
	sbc a,rd
	snz c
	jmp _L6
#line 43 "c:\users\iris\desktop\2. demo code\bh67f5362_lvd\Source\main.c"
	set _VBAT_flag
_L3:
#line 29 "c:\users\iris\desktop\2. demo code\bh67f5362_lvd\Source\main.c"
;# 29 "c:\users\iris\desktop\2. demo code\bh67f5362_lvd\Source\main.c" 1
	clr wdt
	jmp _L6
	jmp $
_main endp

@dummy proc
	call _main
@dummy endp

#line 29 "c:\users\iris\desktop\2. demo code\bh67f5362_lvd\Source\main.c"
#pragma debug scope 1 1
public _VBAT_flag
@HCCINIT	.section 'data'
#line 10 "c:\users\iris\desktop\2. demo code\bh67f5362_lvd\Source\main.c"
@BITDATASEC .section 'data'
_VBAT_flag	dbit 0
#pragma debug variable 2 1 _VBAT_flag "VBAT_flag"
#line 9 "c:\users\iris\desktop\2. demo code\bh67f5362_lvd\Source\main.c"
public _VBAT
@HCCINIT0_VBAT .section 'data'
_VBAT	db 4 dup(0)
#pragma debug variable 14 1 _VBAT "VBAT"

@HCCINIT .section 'data'
#pragma debug struct_begin 42 "__status_bits"
#pragma debug field 21 8 0 1 "__c" ;0,1
#pragma debug field 21 8 0 1 "__ac" ;1,1
#pragma debug field 21 8 0 1 "__z" ;2,1
#pragma debug field 21 8 0 1 "__ov" ;3,1
#pragma debug field 21 8 0 1 "__pdf" ;4,1
#pragma debug field 21 8 0 1 "__to" ;5,1
#pragma debug field 21 8 0 1 "__cz" ;6,1
#pragma debug field 21 8 0 1 "__sc" ;7,1
#pragma debug struct_end
#pragma debug union_begin 43 ""
#pragma debug field 2 42 "bits"
#pragma debug field 0 8 "byte"
#pragma debug union_end
#pragma debug variable 43 1 ___status "__status" 1
#pragma debug struct_begin 44 "__intc0_bits"
#pragma debug field 21 8 0 1 "__emi" ;0,1
#pragma debug field 21 8 0 1 "__int0e" ;1,1
#pragma debug field 21 8 0 1 "__int1e" ;2,1
#pragma debug field 21 8 0 1 "__mf6e" ;3,1
#pragma debug field 21 8 0 1 "__int0f" ;4,1
#pragma debug field 21 8 0 1 "__int1f" ;5,1
#pragma debug field 21 8 0 1 "__mf6f" ;6,1
#pragma debug field 21 8 0 1 ;7,1
#pragma debug struct_end
#pragma debug union_begin 45 ""
#pragma debug field 2 44 "bits"
#pragma debug field 0 8 "byte"
#pragma debug union_end
#pragma debug variable 45 1 ___intc0 "__intc0" 1
#pragma debug struct_begin 46 "__intc2_bits"
#pragma debug field 21 8 0 1 "__mf2e" ;0,1
#pragma debug field 21 8 0 1 "__mf8e" ;1,1
#pragma debug field 21 8 0 1 "__mf9e" ;2,1
#pragma debug field 21 8 0 1 "__mf3e" ;3,1
#pragma debug field 21 8 0 1 "__mf2f" ;4,1
#pragma debug field 21 8 0 1 "__mf8f" ;5,1
#pragma debug field 21 8 0 1 "__mf9f" ;6,1
#pragma debug field 21 8 0 1 "__mf3f" ;7,1
#pragma debug struct_end
#pragma debug union_begin 47 ""
#pragma debug field 2 46 "bits"
#pragma debug field 0 8 "byte"
#pragma debug union_end
#pragma debug variable 47 1 ___intc2 "__intc2" 1
#pragma debug struct_begin 48 "__wdtc_bits"
#pragma debug field 21 8 0 1 "__ws0" ;0,1
#pragma debug field 21 8 0 1 "__ws1" ;1,1
#pragma debug field 21 8 0 1 "__ws2" ;2,1
#pragma debug field 21 8 0 1 "__we0" ;3,1
#pragma debug field 21 8 0 1 "__we1" ;4,1
#pragma debug field 21 8 0 1 "__we2" ;5,1
#pragma debug field 21 8 0 1 "__we3" ;6,1
#pragma debug field 21 8 0 1 "__we4" ;7,1
#pragma debug struct_end
#pragma debug union_begin 49 ""
#pragma debug field 2 48 "bits"
#pragma debug field 0 8 "byte"
#pragma debug union_end
#pragma debug variable 49 1 ___wdtc "__wdtc" 1
#pragma debug struct_begin 50 "__lvrc_bits"
#pragma debug field 21 8 0 1 "__lvs0" ;0,1
#pragma debug field 21 8 0 1 "__lvs1" ;1,1
#pragma debug field 21 8 0 1 "__lvs2" ;2,1
#pragma debug field 21 8 0 1 "__lvs3" ;3,1
#pragma debug field 21 8 0 1 "__lvs4" ;4,1
#pragma debug field 21 8 0 1 "__lvs5" ;5,1
#pragma debug field 21 8 0 1 "__lvs6" ;6,1
#pragma debug field 21 8 0 1 "__lvs7" ;7,1
#pragma debug struct_end
#pragma debug union_begin 51 ""
#pragma debug field 2 50 "bits"
#pragma debug field 0 8 "byte"
#pragma debug union_end
#pragma debug variable 51 1 ___lvrc "__lvrc" 1
#pragma debug struct_begin 52 "__lvdc_bits"
#pragma debug field 21 8 0 1 "__vlvd0" ;0,1
#pragma debug field 21 8 0 1 "__vlvd1" ;1,1
#pragma debug field 21 8 0 1 "__vlvd2" ;2,1
#pragma debug field 21 8 0 1 ;3,1
#pragma debug field 21 8 0 1 "__lvden" ;4,1
#pragma debug field 21 8 0 1 "__lvdo" ;5,1
#pragma debug field 21 8 0 2 ;6,2
#pragma debug struct_end
#pragma debug union_begin 53 ""
#pragma debug field 2 52 "bits"
#pragma debug field 0 8 "byte"
#pragma debug union_end
#pragma debug variable 53 1 ___lvdc "__lvdc" 1
#pragma debug struct_begin 54 "__mfi3_bits"
#pragma debug field 21 8 0 1 "__lve" ;0,1
#pragma debug field 21 8 0 1 "__dee" ;1,1
#pragma debug field 21 8 0 1 "__spie" ;2,1
#pragma debug field 21 8 0 1 "__sime" ;3,1
#pragma debug field 21 8 0 1 "__lvf" ;4,1
#pragma debug field 21 8 0 1 "__def" ;5,1
#pragma debug field 21 8 0 1 "__spif" ;6,1
#pragma debug field 21 8 0 1 "__simf" ;7,1
#pragma debug struct_end
#pragma debug union_begin 55 ""
#pragma debug field 2 54 "bits"
#pragma debug field 0 8 "byte"
#pragma debug union_end
#pragma debug variable 55 1 ___mfi3 "__mfi3" 1
#line 12 "c:\users\iris\desktop\2. demo code\bh67f5362_lvd\Source\main.c"
@code .section at 0 'code'
	clr bp
	jmp _main_startup1

extern _Drv_SysClockInit:near
extern _Drv_RamInit:near
extern _Drv_LVD:near

; 
; Generated by holtek-gcc v3.20, Fri Aug 28 11:21:42 2020
; Rebuild 610
; end of file
